Texas Instruments AM335 Series

USB Registers www.ti.com
16.5.7.8 FDBSC5 Register (offset = 34h) [reset = 0h]
FDBSC5 is shown in Figure 16-284 and described in Table 16-298.
Figure 16-284. FDBSC5 Register
31 30 29 28 27 26 25 24
FDBQ23_STARVE_CNT
R-0
23 22 21 20 19 18 17 16
FDBQ22_STARVE_CNT
R-0
15 14 13 12 11 10 9 8
FDBQ21_STARVE_CNT
R-0
7 6 5 4 3 2 1 0
FDBQ20_STARVE_CNT
R-0
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-298. FDBSC5 Register Field Descriptions
Bit Field Type Reset Description
31-24 FDBQ23_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 23
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
23-16 FDBQ22_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 22
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
15-8 FDBQ21_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 21
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
7-0 FDBQ20_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 20
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
Queue_Manager_Free_Descriptor_Buffer_Starvation_Count
Register 5
2116
Universal Serial Bus (USB) SPRUH73H–October 2011–Revised April 2013
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated