Texas Instruments AM335 Series Technical Reference Manual

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20.4.4.1.5 WDT_WIER Register (offset = 1Ch) [reset = 0h]
WDT_WIER is shown in Figure 20-103 and described in Table 20-116.
The Watchdog Interrupt Enable Register controls (enable/disable) the interrupt events.
Figure 20-103. WDT_WIER Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
Reserved DLY_IT_ENA OVF_IT_ENA
R-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 20-116. WDT_WIER Register Field Descriptions
Bit Field Type Reset Description
31-2 Reserved R 0h
1 DLY_IT_ENA R/W 0h
Delay interrupt enable/disable
0x0 = Disable delay interrupt.
0x1 = Enable delay interrupt.
0 OVF_IT_ENA R/W 0h
Overflow interrupt enable/disable
0x0 = Disable overflow interrupt.
0x1 = Enable overflow interrupt.
3686
Timers SPRUH73H–October 2011–Revised April 2013
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Texas Instruments AM335 Series Specifications

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Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English