Interrupt Controller Registers
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6.5.1.7 INTC_PROTECTION Register (offset = 4Ch) [reset = 0h]
INTC_PROTECTION is shown in Figure 6-10 and described in Table 6-10.
This register controls protection of the other registers. This register can only be accessed in priviledged
mode, regardless of the curent value of the protection bit.
Figure 6-10. INTC_PROTECTION Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
Reserved Protection
R-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 6-10. INTC_PROTECTION Register Field Descriptions
Bit Field Type Reset Description
31-1 Reserved R 0h Write 0's for future compatibility.
Reads returns 0
0 Protection R/W 0h
Protection mode
0x0 = ProtMDis : Protection mode disabled (default)
0x1 = ProtMEnb : Protection mode enabled. When enabled, only
priviledged mode can access registers.
212
Interrupts SPRUH73H–October 2011–Revised April 2013
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