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Ethernet Subsystem Registers
14.5.8.7 THRU_RATE Register (offset = 18h) [reset = 3003h]
THRU_RATE is shown in Figure 14-190 and described in Table 14-207.
THROUGHPUT RATE
Figure 14-190. THRU_RATE Register
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
SL_RX_THRU_RATE Reserved
R/W-0
7 6 5 4 3 2 1 0
Reserved CPDMA_THRU_RATE
R/W-0
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 14-207. THRU_RATE Register Field Descriptions
Bit Field Type Reset Description
15-12 SL_RX_THRU_RATE R/W-0 0 CPGMAC_SL Switch FIFO receive through rate.
This register value is the maximum throughput of the ethernet ports
to the crossbar SCR.
The default is one
8-byte word for every 3 CLK periods maximum.
3-0 CPDMA_THRU_RATE R/W-0 0 CPDMA Switch FIFO receive through rate.
This register value is the maximum throughput of the CPDMA host
port to the crossbar SCR.
The default is one
8-byte word for every 3 CLK periods maximum.
1431
SPRUH73H–October 2011–Revised April 2013 Ethernet Subsystem
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