Texas Instruments AM335 Series Technical Reference Manual

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17.1.5.30 IRQENABLE_CLR_0 Register (offset = 10Ch) [reset = 0h]
IRQENABLE_CLR_0 is shown in Figure 17-32 and described in Table 17-44.
The interrupt enable register enables to mask the module internal source of interrupt to the corresponding
user. This register is write 1 to clear.
Figure 17-32. IRQENABLE_CLR_0 Register
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
NotFullStatusUuMB7 NewMSGStatusUuMB NotFullStatusUuMB6 NewMSGStatusUuMB NotFullStatusUuMB5 NewMSGStatusUuMB NotFullStatusUuMB4 NewMSGStatusUuMB
7 6 5 4
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
7 6 5 4 3 2 1 0
NotFullStatusUuMB3 NewMSGStatusUuMB NotFullStatusUuMB2 NewMSGStatusUuMB NotFullStatusUuMB1 NewMSGStatusUuMB NotFullStatusUuMB0 NewMSGStatusUuMB
3 2 1 0
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 17-44. IRQENABLE_CLR_0 Register Field Descriptions
Bit Field Type Reset Description
15 NotFullStatusUuMB7 R/W 0h
Not Full Status bit for User u, Mailbox 7
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
14 NewMSGStatusUuMB7 R/W 0h
New Message Status bit for User u, Mailbox 7
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
13 NotFullStatusUuMB6 R/W 0h
Not Full Status bit for User u, Mailbox 6
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
12 NewMSGStatusUuMB6 R/W 0h
New Message Status bit for User u, Mailbox 6
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
11 NotFullStatusUuMB5 R/W 0h
Not Full Status bit for User u, Mailbox 5
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
10 NewMSGStatusUuMB5 R/W 0h
New Message Status bit for User u, Mailbox 5
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
9 NotFullStatusUuMB4 R/W 0h
Not Full Status bit for User u, Mailbox 4
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
8 NewMSGStatusUuMB4 R/W 0h
New Message Status bit for User u, Mailbox 4
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
7 NotFullStatusUuMB3 R/W 0h
Not Full Status bit for User u, Mailbox 3
0 = NoAction : No action
1 = SetEvent : Set the event (for debug)
3280
Interprocessor Communication SPRUH73H–October 2011–Revised April 2013
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Texas Instruments AM335 Series Specifications

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Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English