Interrupt Controller Registers
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6.5.1.3 INTC_SYSSTATUS Register (offset = 14h) [reset = 0h]
INTC_SYSSTATUS is shown in Figure 6-6 and described in Table 6-6.
This register provides status information about the module
Figure 6-6. INTC_SYSSTATUS Register
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Reserved ResetDone
R-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 6-6. INTC_SYSSTATUS Register Field Descriptions
Bit Field Type Reset Description
7-1 Reserved R 0h
Reserved for OCP socket status information Read returns 0
0 ResetDone R 0h
Internal reset monitoring
0x0 = rstOngoing : Internal module reset is on-going
0x1 = rstComp : Reset completed
208
Interrupts SPRUH73H–October 2011–Revised April 2013
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