USB Registers
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16.5.5.7 RXHPCRB0 Register (offset = 810h) [reset = 0h]
RXHPCRB0 is shown in Figure 16-158 and described in Table 16-170.
Figure 16-158. RXHPCRB0 Register
31 30 29 28 27 26 25 24
Reserved RX_HOST_FDQ3_QMGR RX_HOST_FDQ3_QNUM
W-0h W-0h
23 22 21 20 19 18 17 16
RX_HOST_FDQ3_QNUM
W-0h
15 14 13 12 11 10 9 8
Reserved RX_HOST_FDQ2_QMGR RX_HOST_FDQ2_QNUM
W-0h W-0h
7 6 5 4 3 2 1 0
RX_HOST_FDQ2_QNUM
W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-170. RXHPCRB0 Register Field Descriptions
Bit Field Type Reset Description
29-28 RX_HOST_FDQ3_QMGR W 0h
This field specifies which Manager should be used for the 4th or later
Rx buffers in a host type packet
27-16 RX_HOST_FDQ3_QNUM W 0h
This field specifies which Free Descriptor Queue should be used for
the 4th or later Rx buffers in a host type packet
13-12 RX_HOST_FDQ2_QMGR W 0h
This field specifies which Buffer Manager should be used for the 3rd
Rx buffer in a host type packet
11-0 RX_HOST_FDQ2_QNUM W 0h This field specifies which Free Descriptor / Buffer Pool should be
used for the 3rd Rx buffer in a host type packet Table
101 -Rx Channel N Host Packet Configuration Registers B
1936
Universal Serial Bus (USB) SPRUH73H–October 2011–Revised April 2013
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