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GPMC
7.1.4 Use Cases
7.1.4.1 How to Set GPMC Timing Parameters for Typical Accesses
7.1.4.1.1 External Memory Attached to the GPMC Module
As discussed in the introduction to this chapter, the GPMC module supports the following external
memory types:
• Asynchronous or synchronous, 8-bit or 16-bit-width memory or device
• 16-bit address/data-multiplexed or not multiplexed NOR flash device
• 8- or 16-bit NAND flash device
The following examples show how to calculate GPMC timing parameters by showing a typical parameter
setup for the access to be performed.
The example is based on a 512-Mb multiplexed NOR flash memory with the following characteristics:
• Type: NOR flash (address/data-multiplexed mode)
• Size: 512M bits
• Data Bus: 16 bits wide
• Speed: 104 MHz clock frequency
• Read access time: 80 ns
7.1.4.1.2 Typical GPMC Setup
Table 7-45 lists some of the I/Os of the GPMC module.
Table 7-45. GPMC Signals
Signal Name I/O Description
GPMC_FCLK Internal Functional and interface clock. Acts as the time reference.
GPMC_CLK O External clock provided to the external device for synchronous operations
GPMC_A[27:17] O Address
GPMC_AD[15: 0] I/O Data-multiplexed with addresses A[16:1] on memory side
GPMC_CSxn O Chip-select (where x = 0, or 1)
GPMC_ADVn_ALE O Address valid enable
GPMC_OE_REn O Output enable (read access only)
GPMC_WEn O Write enable (write access only)
GPMC_WAIT[1:0] I Ready signal from memory device. Indicates when valid burst data is ready to be read
355
SPRUH73H–October 2011–Revised April 2013 Memory Subsystem
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