Pulse-Width Modulation Subsystem (PWMSS)
www.ti.com
15.1.3.1 IDVER Register (offset = 0h) [reset = 40000000h]
IDVER is shown in Figure 15-2 and described in Table 15-6.
The IP revision register is used by software to track features, bugs, and compatibility.
Figure 15-2. IDVER Register
31 30 29 28 27 26 25 24
SCHEME Reserved FUNC
R-1h R-0h R-0h
23 22 21 20 19 18 17 16
FUNC
R-0h
15 14 13 12 11 10 9 8
R_RTL X_MAJOR
R-0h R-0h
7 6 5 4 3 2 1 0
CUSTOM Y_MINOR
R-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 15-6. IDVER Register Field Descriptions
Bit Field Type Reset Description
31-30 SCHEME R 1h
Used to distinguish between the old scheme and current.
29-28 Reserved R 0h
27-16 FUNC R 0h
FUNC
15-11 R_RTL R 0h
RTL version (R), maintained by IP design owner.
10-8 X_MAJOR R 0h
Major revision (X)
7-6 CUSTOM R 0h
CUSTOM
5-0 Y_MINOR R 0h
Minor revision (Y)
1490
Pulse-Width Modulation Subsystem (PWMSS) SPRUH73H–October 2011–Revised April 2013
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated