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WATCHDOG
20.4.3.14 Low-Level Programming Model
This section covers the low-level hardware programming sequences for configuration and use of the
module.
20.4.3.14.1 Global Initialization
20.4.3.14.1.1 Surrounding Modules Global Initialization
This section identifies the requirements for initializing the surrounding modules when the watchdog timer is
to be used for the first time after a device reset. This initialization of surrounding modules is based on the
integration and environment of the watchdog timer (see Table 20-106).
Table 20-106. Global Initialization of Surrounding Modules
Surrounding Modules Comments
PRCM The module interface and functional clocks must be enabled.
Control module Module-specific pad multiplexing must be set in the control module.
MPU INTC The MPU INTC configuration must be performed to enable the interrupts from the watchdog
timer.
20.4.3.14.1.2 Main Sequence – Watchdog Timer Module Global Initialization
Table 20-107 lists the steps for initializing the watchdog timer module when the module is to be used for
the first time.
Table 20-107. Watchdog Timer Module Global Initialization
Step Register/Bit Field/Programming Model Value
Execute software reset. WDT_WDSC[1] SOFTRESET 1
Wait until reset release? WDT_WDSC[1] SOFTRESET 0
Enable delay interrupt. WDT_WIRQENSET[1] ENABLE_DLY 1
Enable overflow interrupt. WDT_WIRQENSET[0] ENABLE_OVF 1
20.4.3.14.2 Operational Mode Configuration
20.4.3.14.2.1 Main Sequence – Watchdog Timer Basic Configuration
Table 20-108 lists the steps for the basic configuration of the watchdog timer.
Table 20-108. Watchdog Timer Basic Configuration
Step Register/Bit Field/Programming Model Value
Disable the watchdog timer. See Section 20.4.3.14.2.2.
Set prescaler value. WDT_WCLR[4:2] PTV xxx
Enable prescaler. WDT_WCLR[5] PRE 1
Load delay configuration value. WDT_WDLY xxx
Load timer counter value. WDT_WCRR xxx
Enable the watchdog timer. See Section 20.4.3.14.2.3.
3679
SPRUH73H–October 2011–Revised April 2013 Timers
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