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EDMA3 Registers
11.4.2.7.16 Destination FIFO Count Reload Register (DFCNTRLDn)
The destination FIFO count reload register (DFCNTRLDn) is shown in Figure 11-130 and described in
Table 11-115.
Figure 11-130. Destination FIFO Count Reload Register (DFCNTRLDn)
31 16
Reserved
R-0
15 0
ACNTRLD
R-0
LEGEND: R = Read only; -n = value after reset
Table 11-115. Destination FIFO Count Reload Register (DFCNTRLDn) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reserved. Always write 0 to this bit; writes of 1 to this bit are not supported and attempts to do so
may result in undefined behavior.
15-0 ACNTRLD 0-FFFFh A-count reload value. Represents the originally programmed value of ACNT. The reload value is
used to reinitialize ACNT after each array is serviced.
11.4.2.7.17 Destination FIFO Source Address B-Reference Register (DFSRCBREFn)
The destination FIFO source address B-reference register (DFSRCBREFn) is shown in Figure 11-131 and
described in Table 11-116.
Figure 11-131. Destination FIFO Source Address B-Reference Register (DFSRCBREFn)
31 16
Reserved
R-0
15 0
Reserved
R-0
LEGEND: R = Read only; -n = value after reset
Table 11-116. Destination FIFO Source Address B-Reference Register (DFSRCBREFn) Field
Descriptions
Bit Field Value Description
31-0 Reserved 0 Reserved. Always read as 0.
1017
SPRUH73H–October 2011–Revised April 2013 Enhanced Direct Memory Access (EDMA)
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