CONTROL_MODULE Registers
www.ti.com
9.3.42 vdd_mpu_opp_050 Register (offset = 770h) [reset = 0h]
vdd_mpu_opp_050 is shown in Figure 9-45 and described in Table 9-52.
Figure 9-45. vdd_mpu_opp_050 Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
ntarget
R-0h
15 14 13 12 11 10 9 8
ntarget
R-0h
7 6 5 4 3 2 1 0
ntarget
R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 9-52. vdd_mpu_opp_050 Register Field Descriptions
Bit Field Type Reset Description
31-24 Reserved R 0h
23-0 ntarget R 0h Ntarget value for MPU Voltage domain OPP50
Reset value is device-dependent.
806
Control Module SPRUH73H–October 2011–Revised April 2013
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
To Next Page
Loading...
Need help?
General
