CONTROL_MODULE Registers
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9.3.20 tptc_cfg Register (offset = 614h) [reset = 0h]
tptc_cfg is shown in Figure 9-23 and described in Table 9-30.
Figure 9-23. tptc_cfg Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
Reserved tc2dbs tc1dbs tc0dbs
R-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 9-30. tptc_cfg Register Field Descriptions
Bit Field Type Reset Description
31-6 Reserved R 0h
5-4 tc2dbs R/W 0h TPTC2 Default Burst Size
00: 16 byte
01: 32 byte
10: 64 byte
11: 128 byte
3-2 tc1dbs R/W 0h TPTC1 Default Burst Size
00: 16 byte
01: 32 byte
10: 64 byte
11: 128 byte
1-0 tc0dbs R/W 0h TPTC0 Default Burst Size
00: 16 byte
01: 32 byte
10: 64 byte
11: 128 byte
782
Control Module SPRUH73H–October 2011–Revised April 2013
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