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EDMA3 Registers
11.4.2.7.2 Source Active Source Address Register (SASRC)
The source active source address register (SASRC) is shown in Figure 11-116 and described in Table 11-
101.
Figure 11-116. Source Active Source Address Register (SASRC)
31 0
SADDR
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11-101. Source Active Source Address Register (SASRC) Field Descriptions
Bit Field Value Description
31-0 SADDR 0-FFFF FFFFh Source address for program register set. EDMA3TC updates value according to source
addressing mode (SAM bit in the source active options register, SAOPT) .
11.4.2.7.3 Source Active Count Register (SACNT)
The source active count register (SACNT) is shown in Figure 11-117 and described in Table 11-102.
Figure 11-117. Source Active Count Register (SACNT)
31 16
BCNT
R-0
15 0
ACNT
R-0
LEGEND: R = Read only; -n = value after reset
Table 11-102. Source Active Count Register (SACNT) Field Descriptions
Bit Field Value Description
31-16 BCNT 0-FFFFh B dimension count. Number of arrays to be transferred, where each array is ACNT in length. It is
decremented after each read command appropriately. Represents the amount of data remaining to be
read. It should be 0 when transfer request (TR) is complete.
15-0 ACNT 0-FFFFh A dimension count. Number of bytes to be transferred in first dimension. It is decremented after each read
command appropriately. Represents the amount of data remaining to be read. It should be 0 when
transfer request (TR) is complete.
1007
SPRUH73H–October 2011–Revised April 2013 Enhanced Direct Memory Access (EDMA)
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