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Texas Instruments AM335 Series Technical Reference Manual

Texas Instruments AM335 Series
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Enhanced Quadrature Encoder Pulse (eQEP) Module
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15.4.2.3.1 Position Counter Input Modes
Clock and direction input to position counter is selected using the QSRC bit in the eQEP decoder control
register (QDECCTL), based on interface input requirement as follows:
Quadrature-count mode
Direction-count mode
UP-count mode
DOWN-count mode
15.4.2.3.1.1 Quadrature Count Mode
The quadrature decoder generates the direction and clock to the position counter in quadrature count
mode.
Direction Decoding— The direction decoding logic of the eQEP circuit determines which one of the
sequences (QEPA, QEPB) is the leading sequence and accordingly updates the direction
information in the QDF bit in the eQEP status register (QEPSTS). Table 15-122 and Figure 15-134
show the direction decoding logic in truth table and state machine form. Both edges of the QEPA
and QEPB signals are sensed to generate count pulses for the position counter. Therefore, the
frequency of the clock generated by the eQEP logic is four times that of each input sequence.
Figure 15-135 shows the direction decoding and clock generation from the eQEP input signals.
Phase Error Flag— In normal operating conditions, quadrature inputs QEPA and QEPB will be 90
degrees out of phase. The phase error flag (PHE) is set in the QFLG register when edge transition
is detected simultaneously on the QEPA and QEPB signals to optionally generate interrupts. State
transitions marked by dashed lines in Figure 15-134 are invalid transitions that generate a phase
error.
Count Multiplication— The eQEP position counter provides 4x times the resolution of an input clock by
generating a quadrature-clock (QCLK) on the rising/falling edges of both eQEP input clocks (QEPA
and QEPB) as shown in Figure 15-135.
Reverse Count— In normal quadrature count operation, QEPA input is fed to the QA input of the
quadrature decoder and the QEPB input is fed to the QB input of the quadrature decoder. Reverse
counting is enabled by setting the SWAP bit in the eQEP decoder control register (QDECCTL). This
will swap the input to the quadrature decoder thereby reversing the counting direction.
Table 15-122. Quadrature Decoder Truth Table
Previous Edge Present Edge QDIR QPOSCNT
QA QB UP Increment
QB DOWN Decrement
QA TOGGLE Increment or Decrement
QA QB UP Increment
QB DOWN Decrement
QA TOGGLE Increment or Decrement
QB QA DOWN Increment
QA UP Decrement
QB TOGGLE Increment or Decrement
QB QA DOWN Increment
QA UP Decrement
QB TOGGLE Increment or Decrement
1656
Pulse-Width Modulation Subsystem (PWMSS) SPRUH73HOctober 2011Revised April 2013
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Texas Instruments AM335 Series Specifications

General IconGeneral
BrandTexas Instruments
ModelAM335 Series
CategoryComputer Hardware
LanguageEnglish

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