McASP Registers
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22.4.1.10 Audio Mute Control Register (AMUTE)
The audio mute control register (AMUTE) controls the McASP audio mute (AMUTE) output pin. The value
after reset for register 4 depends on how the pins are being driven. The AMUTE is shown in Figure 22-48
and described in Table 22-21.
Figure 22-48. Audio Mute Control Register (AMUTE)
31 16
Reserved
R-0
15 13 12 11 10 9 8
Reserved XDMAERR RDMAERR XCKFAIL RCKFAIL XSYNCERR
R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
RSYNCERR XUNDRN ROVRN INSTAT INEN INPOL MUTEN
R/W-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-21. Audio Mute Control Register (AMUTE) Field Descriptions
Bit Field Value Description
31-13 Reserved 0 Reserved. The reserved bit location always returns the default value. A value written to this field has no
effect. If writing to this field, always write the default value for future device compatibility.
12 XDMAERR If transmit DMA error (XDMAERR), drive AMUTE active enable bit.
0 Drive is disabled. Detection of transmit DMA error is ignored by AMUTE.
1 Drive is enabled (active). Upon detection of transmit DMA error, AMUTE is active and is driven
according to MUTEN bit.
11 RDMAERR If receive DMA error (RDMAERR), drive AMUTE active enable bit.
0 Drive is disabled. Detection of receive DMA error is ignored by AMUTE.
1 Drive is enabled (active). Upon detection of receive DMA error, AMUTE is active and is driven
according to MUTEN bit.
10 XCKFAIL If transmit clock failure (XCKFAIL), drive AMUTE active enable bit.
0 Drive is disabled. Detection of transmit clock failure is ignored by AMUTE.
1 Drive is enabled (active). Upon detection of transmit clock failure, AMUTE is active and is driven
according to MUTEN bit
9 RCKFAIL If receive clock failure (RCKFAIL), drive AMUTE active enable bit.
0 Drive is disabled. Detection of receive clock failure is ignored by AMUTE.
1 Drive is enabled (active). Upon detection of receive clock failure, AMUTE is active and is driven
according to MUTEN bit.
8 XSYNCERR If unexpected transmit frame sync error (XSYNCERR), drive AMUTE active enable bit.
0 Drive is disabled. Detection of unexpected transmit frame sync error is ignored by AMUTE.
1 Drive is enabled (active). Upon detection of unexpected transmit frame sync error, AMUTE is active and
is driven according to MUTEN bit.
7 RSYNCERR If unexpected receive frame sync error (RSYNCERR), drive AMUTE active enable bit.
0 Drive is disabled. Detection of unexpected receive frame sync error is ignored by AMUTE.
1 Drive is enabled (active). Upon detection of unexpected receive frame sync error, AMUTE is active and
is driven according to MUTEN bit.
6 XUNDRN If transmit underrun error (XUNDRN), drive AMUTE active enable bit.
0 Drive is disabled. Detection of transmit underrun error is ignored by AMUTE.
1 Drive is enabled (active). Upon detection of transmit underrun error, AMUTE is active and is driven
according to MUTEN bit.
3844
Multichannel Audio Serial Port (McASP) SPRUH73H–October 2011–Revised April 2013
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