Texas Instruments AM335 Series Technical Reference Manual

LSB MSB
1
0
mmc_dat3
...
b3
b3
b3
b3
CRC
Block length
1
0
...
b2
b2
b2
b2
CRC
mmc_dat2
1
0
...
b1
b1
b1
b1
CRC
mmc_dat1
1
0
...
b0
b0
b0
b0
CRC
mmc_dat0
1
0
mmc_dat7
...
b7
b7
b7
b7
CRC
1
0
...
b6
b6
b6
b6
CRC
mmc_dat6
1
0
...
b5
b5
b5
b5
CRC
mmc_dat5
1
0
...
b4
b4
b4
b4
CRC
mmc_dat4
www.ti.com Functional Description
Figure 18-16. Data Packet for Block Transfer (8-Bit)
18.3.2 Resets
18.3.2.1 Hardware Reset
The module is reinitialized by the hardware.
The SD_SYSSTATUS[0] RESETDONE bit can be monitored by the software to check if the module is
ready-to-use after a hardware reset.
This hardware reset signal has a global reset action on the module. All configuration registers and all state
machines are reset in all clock domains.
This hardware reset signal has a global reset action on the module. All configuration registers and all
state-machines are reset in all clock domains.
18.3.2.2 Software Reset
The module is reinitialized by software through the SD_SYSCONFIG[1] SOFTRESET bit. This bit has the
same action on the module logic as the hardware signal except for:
• Debounce logic
• SD_PSTATE, SD_CAPA, and SD_CUR_CAPA registers (see corresponding register descriptions)
The SOFTRESET bit is active high. The bit is automatically reinitialized to 0 by the hardware. The
SD_SYSCTL[24] SRA bit has the same action as the SOFTRESET bit on the design.
The SD_SYSSTATUS[0] RESETDONE bit can be monitored by the software to check if the module is
ready-to-use after a software reset.
3357
SPRUH73H–October 2011–Revised April 2013 Multimedia Card (MMC)
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Texas Instruments AM335 Series Specifications

General

Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English