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Touchscreen Controller Registers
12.5.1.15 STEPENABLE Register (offset = 54h) [reset = 0h]
STEPENABLE is shown in Figure 12-19 and described in Table 12-19.
Step Enable
Figure 12-19. STEPENABLE Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved STEP16
R-0h R/W-0h
15 14 13 12 11 10 9 8
STEP15 STEP14 STEP13 STEP12 STEP11 STEP10 STEP9 STEP8
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
7 6 5 4 3 2 1 0
STEP7 STEP6 STEP5 STEP4 STEP3 STEP2 STEP1 TS_Charge
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 12-19. STEPENABLE Register Field Descriptions
Bit Field Type Reset Description
31-17 Reserved R 0h
RESERVED.
16 STEP16 R/W 0h
Enable step 16
15 STEP15 R/W 0h
Enable step 15
14 STEP14 R/W 0h
Enable step 14
13 STEP13 R/W 0h
Enable step 13
12 STEP12 R/W 0h
Enable step 12
11 STEP11 R/W 0h
Enable step 11
10 STEP10 R/W 0h
Enable step 10
9 STEP9 R/W 0h
Enable step 9
8 STEP8 R/W 0h
Enable step 8
7 STEP7 R/W 0h
Enable step 7
6 STEP6 R/W 0h
Enable step 6
5 STEP5 R/W 0h
Enable step 5
4 STEP4 R/W 0h
Enable step 4
3 STEP3 R/W 0h
Enable step 3
2 STEP2 R/W 0h
Enable step 2
1 STEP1 R/W 0h
Enable step 1
0 TS_Charge R/W 0h
Enable TS Charge step
1053
SPRUH73H–October 2011–Revised April 2013 Touchscreen Controller
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