Texas Instruments AM335 Series Technical Reference Manual

www.ti.com Ethernet Subsystem Registers
14.5.7.2 MACCONTROL Register (offset = 4h) [reset = 0h]
MACCONTROL is shown in Figure 14-174 and described in Table 14-190.
CPGMAC_SL MAC CONTROL REGISTER
Figure 14-174. MACCONTROL Register
31 30 29 28 27 26 25 24
Reserved RX_CMF_EN
R-0h R/W-0h
23 22 21 20 19 18 17 16
RX_CSF_EN RX_CEF_EN TX_SHORT_GAP_LI Reserved EXT_EN GIG_FORCE IFCTL_B
M_EN
R/W-0h R/W-0h R/W-0h R-0h R/W-0h R/W-0h R/W-0h
15 14 13 12 11 10 9 8
IFCTL_A Reserved CMD_IDLE TX_SHORT_GAP_EN Reserved
R/W-0h R-0h R/W-0h R/W-0h R-0h
7 6 5 4 3 2 1 0
GIG TX_PACE GMII_EN TX_FLOW_EN RX_FLOW_EN MTEST LOOPBACK FULLDUPLEX
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 14-190. MACCONTROL Register Field Descriptions
Bit Field Type Reset Description
31-25 Reserved R 0h
24 RX_CMF_EN R/W 0h RX Copy MAC Control Frames Enable - Enables MAC control
frames to be transferred to memory.
MAC control frames are normally acted upon (if enabled), but not
copied to memory.
MAC control frames that are pause frames will be acted upon if
enabled in the MacControl register, regardless of the value of
rx_cmf_en.
Frames transferred to memory due to rx_cmf_en will have the
control bit set in their EOP buffer descriptor.
0 - MAC control frames are filtered (but acted upon if enabled).
1 - MAC control frames are transferred to memory.
23 RX_CSF_EN R/W 0h RX Copy Short Frames Enable - Enables frames or fragments
shorter than 64 bytes to be copied to memory.
Frames transferred to memory due to rx_csf_en will have the
fragment or undersized bit set in their receive footer.
Fragments are short frames that contain CRC/align/code errors and
undersized are short frames without errors.
0 - Short frames are filtered
1 - Short frames are transferred to memory.
22 RX_CEF_EN R/W 0h RX Copy Error Frames Enable - Enables frames containing errors to
be transferred to memory.
The appropriate error bit will be set in the frame receive footer.
Frames containing errors will be filtered when rx_cef _en is not set.
0 - Frames containing errors are filtered.
1 - Frames containing errors are transferred to memory.
21 TX_SHORT_GAP_LIM_E R/W 0h Transmit Short Gap Limit Enable When set this bit limits the number
N of short gap packets transmitted to 100ppm.
Each time a short gap packet is sent, a counter is loaded with
10,000 and decremented on each wireside clock.
Another short gap packet will not be sent out until the counter
decrements to zero.
This mode is included to preclude the host from filling up the FIFO
and sending every packet out with short gap which would violate the
maximum number of packets per second allowed.
20-19 Reserved R 0h
1413
SPRUH73H–October 2011–Revised April 2013 Ethernet Subsystem
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated

Texas Instruments AM335 Series Specifications

General

Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English