GPMC
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7.1.3.8 Set Memory Access
This section details the bit field to configure to set the GPMC in various memory modes.
Table 7-39. Mode Parameters Check List Table
Asynchronous Synchronous
Multiple Multiple Multiple Multiple
Single Single Single Single
Register Bit Bit Field Name
Read Write Read Write
Read Write Read Write
(Page) (Page) (Burst) (Burst)
Access Access Access Access
Access Access Access Access
GPMC_CONFIG1_i 30 READMULTIPLE 0 - 1 N/S 0 - 1 -
GPMC_CONFIG1_i 29 READTYPE 0 - 0 N/S 1 - 1 -
GPMC_CONFIG1_i 28 WRITEMULTIPLE - 0 N/S - 0 - 1
GPMC_CONFIG1_i 27 WRITETYPE - 0 N/S - 1 - 1
Table 7-40. Access Type Parameters Check List Table
Access Type
Register Bit Bit Field Name
Non-Mux Address/Data Mux AAD Mux
GPMC_CONFIG1_i 9-8 MUXADDDATA 0 2h 1
342
Memory Subsystem SPRUH73H–October 2011–Revised April 2013
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