Enhanced Capture (eCAP) Module
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Table 15-100. ECAP Initialization for APWM Mode
Register Bit Value
CAP1 CAP1 0x1000
CTRPHS CTRPHS 0x0
ECCTL2 CAP_APWM EC_APWM_MODE
ECCTL2 APWMPOL EC_ACTV_HI
ECCTL2 SYNCI_EN EC_DISABLE
ECCTL2 SYNCO_SEL EC_SYNCO_DIS
ECCTL2 TSCTRSTOP EC_RUN
Example 15-13. Code Snippet for APWM Mode
// Code snippet for APWM mode Example 1
// Run Time (Instant 1, e.g. ISR call)
//======================
ECAPxRegs.CAP2 = 0x300; // Set Duty cycle i.e. compare value
// Run Time (Instant 2, e.g. another ISR call)
//======================
ECAPxRegs.CAP2 = 0x500; // Set Duty cycle i.e. compare value
15.3.3.5.2 Multichannel PWM Generation with Synchronization Example
Figure 15-114 takes advantage of the synchronization feature between eCAP modules. Here 4
independent PWM channels are required with different frequencies, but at integer multiples of each other
to avoid "beat" frequencies. Hence one eCAP module is configured as the Master and the remaining 3 are
Slaves all receiving their synch pulse (CTR = PRD) from the master. Note the Master is chosen to have
the lower frequency (F1 = 1/20,000) requirement. Here Slave2 Freq = 2 × F1, Slave3 Freq = 4 × F1 and
Slave4 Freq = 5 × F1. Note here values are in decimal notation. Also, only the APWM1 output waveform
is shown.
1628
Pulse-Width Modulation Subsystem (PWMSS) SPRUH73H–October 2011–Revised April 2013
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