USB Registers
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16.5.7.20 QMEMCTRL0 Register (offset = 1004h) [reset = 0h]
QMEMCTRL0 is shown in Figure 16-296 and described in Table 16-310.
Figure 16-296. QMEMCTRL0 Register
31 30 29 28 27 26 25 24
Reserved START_INDEX
R/W-0
23 22 21 20 19 18 17 16
START_INDEX
R/W-0
15 14 13 12 11 10 9 8
Reserved DESC_SIZE
R/W-0
7 6 5 4 3 2 1 0
Reserved REG_SIZE
R/W-0
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-310. QMEMCTRL0 Register Field Descriptions
Bit Field Type Reset Description
29-16 START_INDEX R/W-0 0 This field indicates where in linking RAM does the descriptor linking
information corresponding to memory region R starts.
11-8 DESC_SIZE R/W-0 0 This field indicates the size of each descriptor in this memory region.
It is an encoded value that specifies descriptor size as
2^(5+desc_size) number of bytes.
The settings of desc_size from
9-15 are reserved.
2-0 REG_SIZE R/W-0 0 This field indicates the size of the memory region (in terms of
number of descriptors).
It is an encoded value that specifies region size as 2^(5+reg_size)
number of descriptors.
Queue Manager Memory Region R Control Registers The following
sections describe each of the four register locations that may be
present for each queue in the queues region.
For reasons of implementation and area efficiency, these registers
are not actually implemented as a huge array of flip flops but are
instead implemented as a single set of mailbox registers which use
the LSBs of the provided address as a queue index.
Due to this implementation all accesses to these registers need to
be performed as a single burst write for each packet push operation
or a single burst read for each packet pop operation.
The length of a burst to push or pop a packet will vary depending on
the optional features that the queue supports which may be 4, 8, 12
or 16 bytes.
Queue N Register D must always be written / read in the burst but
the preceding words are optional depending on the required queue
functionality.
2128
Universal Serial Bus (USB) SPRUH73H–October 2011–Revised April 2013
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