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McSPI Registers
24.4.1.13 McSPI Transfer Levels Register (MCSPI_XFERLEVEL)
The McSPI transfer levels register (MCSPI_XFERLEVEL) provides the transfer levels needed while using
the FIFO buffer during transfer. The MCSPI_XFERLEVEL is shown in Figure 24-38 and described in
Table 24-24.
Figure 24-38. McSPI Transfer Levels Register (MCSPI_XFERLEVEL)
31 16
WCNT
R/W-0
15 14 13 8 7 6 5 0
Reserved AFL Reserved AEL
R-0 R/W-0 R-0 R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 24-24. McSPI Transfer Levels Register (MCSPI_XFERLEVEL) Field Descriptions
Bit Field Value Description
31-16 WCNT SPI word counter. Holds the programmable value of the number of SPI words to be transferred on the
channel that is using the FIFO buffer. When the transfer has started, a read back of this register returns
the current SPI word transfer index.
0 Counter not used
1 1 SPI word
... ...
FFFEh 65534 SPI word
FFFFh 65535 SPI word
15-14 Reserved 0 Reserved.
13-8 AFL Buffer almost full. Holds the programmable almost full level value used to determine almost full buffer
condition. If you want an interrupt or a DMA read request to be issued during a receive operation when
the data buffer holds at least n bytes, then the buffer MCSPI_MODULCTRL[AFL] must be set with n - 1.
0 1 byte
1 2 bytes
... ...
3Fh 64 bytes
7-6 Reserved 0 Reserved.
5-0 AEL Buffer almost empty. Holds the programmable almost empty level value used to determine almost
empty buffer condition. If you want an interrupt or a DMA write request to be issued during a transmit
operation when the data buffer is able to receive n bytes, then the buffer MCSPI_MODULCTRL[AEL]
must be set with n - 1.
0 1 byte
1 2 bytes
... ...
3Fh 64 bytes
4053
SPRUH73H–October 2011–Revised April 2013 Multichannel Serial Port Interface (McSPI)
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