GPIO Registers
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25.4.1.16 GPIO_OE Register (offset = 134h) [reset = FFFFFFFFh]
GPIO_OE is shown in Figure 25-22 and described in Table 25-21.
The GPIO_OE register is used to enable the pins output capabilities. At reset, all the GPIO related pins
are configured as input and output capabilities are disabled. This register is not used within the module, its
only function is to carry the pads configuration. When the application is using a pin as an output and does
not want interrupt generation from this pin, the application can/has to properly configure the Interrupt
Enable registers.
Figure 25-22. GPIO_OE Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OUTPUTEN[n]
R/W-FFFFFFFFh
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 25-21. GPIO_OE Register Field Descriptions
Bit Field Type Reset Description
31-0 OUTPUTEN[n] R/W FFFFFFFFh
Output Data Enable
0x0 = The corresponding GPIO port is configured as an output.
0x1 = The corresponding GPIO port is configured as an input.
4084
General-Purpose Input/Output SPRUH73H–October 2011–Revised April 2013
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