USB Registers
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16.5.7.10 FDBSC7 Register (offset = 3Ch) [reset = 0h]
FDBSC7 is shown in Figure 16-286 and described in Table 16-300.
Figure 16-286. FDBSC7 Register
31 30 29 28 27 26 25 24
FDBQ31_STARVE_CNT
R-0
23 22 21 20 19 18 17 16
FDBQ30_STARVE_CNT
R-0
15 14 13 12 11 10 9 8
FDBQ29_STARVE_CNT
R-0
7 6 5 4 3 2 1 0
FDBQ28_STARVE_CNT
R-0
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-300. FDBSC7 Register Field Descriptions
Bit Field Type Reset Description
31-24 FDBQ31_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 31
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
23-16 FDBQ30_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 30
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
15-8 FDBQ29_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 29
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
7-0 FDBQ28_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 28
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
Queue_Manager_Free_Descriptor_Buffer_Starvation_Count
Register 7
2118
Universal Serial Bus (USB) SPRUH73H–October 2011–Revised April 2013
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