PRCM
MPU Subsystem
TIM7_OUT
pieventcapt
portimerpwm
Timer Pads
piclktimer
CLK_32KHZ
TCLKIN
porgpocfg
TIM6_OUT
TIM5_OUT
TIM4_OUT
TIMERx_GCLK
pointr_pend
CLK_M_OSC
Device
0
1
2
pointr_swakeup
To 3GMACSS
DMTIMER_DMC
(Timer2)
DMTIMER_DMC
(Timer3)
DMTIMER_DMC
(Timer4)
DMTIMER_DMC
(Timer5)
DMTIMER_DMC
(Timer6)
DMTIMER_DMC
(Timer7)
L4 Peripheral
Interconnect
To TSC_ADC
EVT_CAPT mux
(Timer 4–7 only)
DMTimer
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Figure 20-3. Timer2-7 Integration
20.1.2.1 Timer Connectivity Attributes
Table 20-2. Timer[0] Connectivity Attributes
Attributes Type
Power domain Wakeup domain
Clock Domain PD_WKUP_L4_WKUP_GCLK (Interface/OCP)
PD_WKUP_TIMER0_GCLK (Func)
Reset Signals WKUP_DOM_RST_N
Idle/Wakeup Signals Idle
Slave Wakeup
Interrupt Requests 1 to MPU Subsystem (TINT0), 1 to WakeM3
DMA Requests None
Physical Address L4 Wakeup slave port
3554
Timers SPRUH73H–October 2011–Revised April 2013
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