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CONTROL_MODULE Registers
9.3.84 ipc_msg_reg4 Register (offset = 1338h) [reset = 0h]
ipc_msg_reg4 is shown in Figure 9-87 and described in Table 9-94. This register is typically used for
messaging between Cortex A8 and CortexM3 (WKUP).
See the section "Functional Sequencing for Power Management with Cortex M3" for specific information
on how the IPC_MSG_REG registers are used to communicate with the Cortex-M3 firmware.
Figure 9-87. ipc_msg_reg4 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ipc_msg_reg4
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 9-94. ipc_msg_reg4 Register Field Descriptions
Bit Field Type Reset Description
31-0 ipc_msg_reg4 R/W 0h Inter Processor Messaging Register
849
SPRUH73H–October 2011–Revised April 2013 Control Module
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