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Ethernet Subsystem Registers
14.5.6.28 P1_RX_DSCP_PRI_MAP1 Register (offset = 134h) [reset = 0h]
P1_RX_DSCP_PRI_MAP1 is shown in Figure 14-148 and described in Table 14-163.
CPSW PORT 1 RX DSCP PRIORITY TO RX PACKET MAPPING REG 1
Figure 14-148. P1_RX_DSCP_PRI_MAP1 Register
31 30 29 28 27 26 25 24
Reserved PRI15 Reserved PRI14
R/W-0h R/W-0h
23 22 21 20 19 18 17 16
Reserved PRI13 Reserved PRI12
R/W-0h R/W-0h
15 14 13 12 11 10 9 8
Reserved PRI11 Reserved PRI10
R/W-0h R/W-0h
7 6 5 4 3 2 1 0
Reserved PRI9 Reserved PRI8
R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 14-163. P1_RX_DSCP_PRI_MAP1 Register Field Descriptions
Bit Field Type Reset Description
30-28 PRI15 R/W 0h Priority
15 - A packet TOS of 0d15 is mapped to this received packet
priority.
26-24 PRI14 R/W 0h Priority
14 - A packet TOS of 0d14 is mapped to this received packet
priority.
22-20 PRI13 R/W 0h Priority
13 - A packet TOS of 0d13 is mapped to this received packet
priority.
18-16 PRI12 R/W 0h Priority
12 - A packet TOS of 0d12 is mapped to this received packet
priority.
14-12 PRI11 R/W 0h Priority
11 - A packet TOS of 0d11 is mapped to this received packet
priority.
10-8 PRI10 R/W 0h Priority
10 - A packet TOS of 0d10 is mapped to this received packet
priority.
6-4 PRI9 R/W 0h Priority
9 - A packet TOS of 0d9 is mapped to this received packet priority.
2-0 PRI8 R/W 0h Priority
8 - A packet TOS of 0d8 is mapped to this received packet priority.
1385
SPRUH73H–October 2011–Revised April 2013 Ethernet Subsystem
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