Full
Empty
LH or DMA Read
Core Write
.
<MCSPI_IRQSTATUS[RiF]>*
* non-DMA mode only. In DMA mode, the DMA RX request is asserted
to its active level under identical conditions.
<MCSPI_XFERLEVEL[AFL]>
(in bytes)
Functional Description
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24.3.2.10.2 Buffer Almost Full
The bit field MCSPI_XFERLEVEL[AFL] is needed when the buffer is used to receive SPI word from a
slave (MCSPI_CH(I)CONF[FFER] must be set to 1). It defines the almost full buffer status.
When FIFO pointer reaches this level an interrupt or a DMA request is sent to the CPU to enable system
to read AFL+1 bytes from receive register. Be careful AFL+1 must correspond to a multiple value of
MCSPI_CH(I)CONF[WL].
When DMA is used, the request is de-asserted after the first receive register read.
No new request will be asserted until the system has performed the correct number of read operations
from the buffer.
Figure 24-19. Buffer Almost Full Level (AFL)
NOTE: SPI_IRQSTATUS register bits are not available in DMA mode. In DMA mode, the
SPIm_DMA_RXn request is asserted on the same conditions as the SPI_IRQSTATUS
RXn_FULL flag.
4018
Multichannel Serial Port Interface (McSPI) SPRUH73H–October 2011–Revised April 2013
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