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WATCHDOG
20.4.4.1.8 WDT_WLDR Register (offset = 2Ch) [reset = 0h]
WDT_WLDR is shown in Figure 20-106 and described in Table 20-119.
The Watchdog Load Register holds the timer load value.
Figure 20-106. WDT_WLDR Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TIMER_LOAD
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 20-119. WDT_WLDR Register Field Descriptions
Bit Field Type Reset Description
31-0 TIMER_LOAD R/W 0h
Value of the timer load register
3689
SPRUH73H–October 2011–Revised April 2013 Timers
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