Texas Instruments AM335 Series Technical Reference Manual

LCD Registers www.ti.com
13.4.7 Precedence Order for Determining Frame Buffer Type
The precedence order for determining frame buffer type is specified as follows:
If (cfg_lcdtft == 1) // active matrix
If (cfg_tft24 == 1) // 24 bpp
If (cfg_tft24_unpacked == 1)
4 pixels in 4 words
else
4 pixels in 3 words
else // 1/2/4/8/12/16 bpp
if (bpp[2] == 1)
12/16 bpp data
else
if (bpp == 0)
1 bpp data
else if (bpp == 1)
2 bpp data
else if (bpp == 2)
4 bpp data
else // if (bpp == 3)
8 bpp data
else // passive matrix
if (bpp[2] == 1)
12/16 bpp data
else
if (bpp == 0)
1 bpp data
else if (bpp == 1)
2 bpp data
else if (bpp == 2)
4 bpp data
else // if (bpp == 3)
8 bpp data
13.5 LCD Registers
Table 13-13 lists the memory-mapped registers for the LCD. All register offset addresses not listed in
Table 13-13 should be considered as reserved locations and the register contents should not be modified.
Table 13-13. LCD REGISTERS
Offset Acronym Register Name Section
0h PID Section 13.5.1
4h CTRL Section 13.5.2
Ch LIDD_CTRL Section 13.5.3
10h LIDD_CS0_CONF Section 13.5.4
14h LIDD_CS0_ADDR Section 13.5.5
18h LIDD_CS0_DATA Section 13.5.6
1Ch LIDD_CS1_CONF Section 13.5.7
20h LIDD_CS1_ADDR Section 13.5.8
24h LIDD_CS1_DATA Section 13.5.9
28h RASTER_CTRL Section 13.5.10
2Ch RASTER_TIMING_0 Section 13.5.11
30h RASTER_TIMING_1 Section 13.5.12
34h RASTER_TIMING_2 Section 13.5.13
38h RASTER_SUBPANEL Section 13.5.14
3Ch RASTER_SUBPANEL2 Section 13.5.15
40h LCDDMA_CTRL Section 13.5.16
44h LCDDMA_FB0_BASE Section 13.5.17
48h LCDDMA_FB0_CEILING Section 13.5.18
1128
LCD Controller SPRUH73H–October 2011–Revised April 2013
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Texas Instruments AM335 Series Specifications

General

Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English