www.ti.com
USB Registers
16.5.7.9 FDBSC6 Register (offset = 38h) [reset = 0h]
FDBSC6 is shown in Figure 16-285 and described in Table 16-299.
Figure 16-285. FDBSC6 Register
31 30 29 28 27 26 25 24
FDBQ27_STARVE_CNT
R-0
23 22 21 20 19 18 17 16
FDBQ26_STARVE_CNT
R-0
15 14 13 12 11 10 9 8
FDBQ25_STARVE_CNT
R-0
7 6 5 4 3 2 1 0
FDBQ24_STARVE_CNT
R-0
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-299. FDBSC6 Register Field Descriptions
Bit Field Type Reset Description
31-24 FDBQ27_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 27
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
23-16 FDBQ26_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 26
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
15-8 FDBQ25_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 25
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
7-0 FDBQ24_STARVE_CNT R-0 0 This field increments each time the Free Descriptor/Buffer Queue 24
is read while it is empty via the CPPI DMA.
This field is cleared when read via the cpu.
Queue_Manager_Free_Descriptor_Buffer_Starvation_Count
Register 6
2117
SPRUH73H–October 2011–Revised April 2013 Universal Serial Bus (USB)
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
To Next Page
Loading...
Need help?
General
