Texas Instruments AM335 Series Technical Reference Manual

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14.5.6.24 P1_SA_LO Register (offset = 120h) [reset = 0h]
P1_SA_LO is shown in Figure 14-144 and described in Table 14-159.
CPSW CPGMAC_SL1 SOURCE ADDRESS LOW REGISTER
Figure 14-144. P1_SA_LO Register
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
MACSRCADDR_7_0
R/W-0h
7 6 5 4 3 2 1 0
MACSRCADDR_15_8
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 14-159. P1_SA_LO Register Field Descriptions
Bit Field Type Reset Description
15-8 MACSRCADDR_7_0 R/W 0h
Source Address Lower 8 bits (byte 0)
7-0 MACSRCADDR_15_8 R/W 0h Source Address bits
15:8 (byte 1)
1381
SPRUH73H–October 2011–Revised April 2013 Ethernet Subsystem
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Texas Instruments AM335 Series Specifications

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Brand	Texas Instruments
Model	AM335 Series
Category	Computer Hardware
Language	English