UART Registers
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19.5.1.7 Interrupt Identification Register (IIR) - IrDA Mode
The IrDA interrupt identification register (IIR) is a read-only register that provides the source of the
interrupt. The IrDA interrupt identification register (IIR) is shown in Figure 19-40 and described in
Table 19-36.
NOTE: An interrupt source can be flagged only if enabled in the IER register.
Figure 19-40. IrDA Interrupt Identification Register (IIR)
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
EOF_IT LINE_STS_IT TX_STATUS_IT STS_FIFO_IT RX_OE_IT RX_FIFO_LAST_BYTE_IT THR_IT RHR_IT
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 19-36. IrDA Interrupt Identification Register (IIR) Field Descriptions
Bit Field Value Description
15-8 Reserved 0 Reserved.
7 EOF_IT 0 Received EOF interrupt inactive.
1 Received EOF interrupt active.
6 LINE_STS_IT 0 Receiver line status interrupt inactive.
1 Receiver line status interrupt active.
5 TX_STATUS_IT 0 TX status interrupt inactive.
1 TX status interrupt active.
4 STS_FIFO_IT 0 Status FIFO trigger level interrupt inactive.
1 Status FIFO trigger level interrupt active.
3 RX_OE_IT 0 RX overrun interrupt inactive.
1 RX overrun interrupt active.
2 RX_FIFO_LAST_BYTE_IT 0 Last byte of frame in RX FIFO interrupt inactive.
1 Last byte of frame in RX FIFO interrupt active.
1 THR_IT 0 THR interrupt inactive.
1 THR interrupt active.
0 RHR_IT 0 RHR interrupt inactive.
1 RHR interrupt active.
3512
Universal Asynchronous Receiver/Transmitter (UART) SPRUH73H–October 2011–Revised April 2013
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