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Functional Description
Table 19-24. CIR Mode Register Overview
(1) (2)
(continued)
Address Registers
Offset
Configuration Mode A Configuration Mode B Operational Mode
Read Write Read Write Read Write
0x020 UART_MDR1[3 UART_MDR1[3: UART_MDR1[3:0] UART_MDR1[3:0] UART_MDR1[3:0] UART_MDR1[3
:0] 0] :0]
0x024 UART_MDR2 UART_MDR2 UART_MDR2 UART_MDR2 UART_MDR2 UART_MDR2
0x028 – – – – – –
0x02C UART_RESUM – UART_RESUME – UART_RESUME –
E
0x030 – – – – – –
0x034 – – – – – –
0x038 – – – – – –
0x03C – – – – UART_ACREG UART_ACREG
0x040 UART_SCR UART_SCR UART_SCR UART_SCR UART_SCR UART_SCR
0x044 UART_SSR – UART_SSR – UART_SSR –
0x048 – – – – UART_EBLR UART_EBLR
0x050 UART_MVR – UART_MVR – UART_MVR –
0x054 UART_SYSC UART_SYSC UART_SYSC UART_SYSC UART_SYSC UART_SYSC
0x058 UART_SYSS – UART_SYSS – UART_SYSS –
0x05C UART_WER[6: UART_WER[6:4 UART_WER[6:4] UART_WER[6:4] UART_WER[6:4] UART_WER[6:
4] ] 4]
0x060 UART_CFPS UART_CFPS UART_CFPS UART_CFPS UART_CFPS UART_CFPS
0x064 UART_RXFIFO UART_RXFIFO_ UART_RXFIFO_LVL UART_RXFIFO_L UART_RXFIFO_LV UART_RXFIFO
_LVL LVL VL L _LVL
0x068 UART_TXFIFO UART_TXFIFO_ UART_TXFIFO_LVL UART_TXFIFO_L UART_TXFIFO_LV UART_TXFIFO
_LVL LVL VL L _LVL
0x06C UART_IER2 UART_IER2 UART_IER2 UART_IER2 UART_IER2 UART_IER2
0x070 UART_ISR2 UART_ISR2 UART_ISR2 UART_ISR2 UART_ISR2 UART_ISR2
0x074 UART_FREQ_ UART_FREQ_S UART_FREQ_SEL UART_FREQ_SE UART_FREQ_SEL UART_FREQ_
SEL EL L SEL
0x080 UART_MDR3 UART_MDR3 UART_MDR3 UART_MDR3 UART_MDR3 UART_MDR3
0x084 UART_TX_DM UART_TX_DMA UART_TX_DMA_TH UART_TX_DMA_ UART_TX_DMA_T UART_TX_DM
A_THRESHOL _THRESHOLD RESHOLD THRESHOLD HRESHOLD A_THRESHOL
D D
19.3.8 Protocol Formatting
The UART/IRDA module can operate in seven different modes:
1. UART 16x mode (≤230.4 Kbits/s), UART16x ≤460Kbits/s if MDR3[1] is set
2. UART 16x mode with autobauding (≥1200 bits/s and ≤115.2 Kbits/s) if MDR3[1] is not set
3. UART 13x mode (≥460.8 Kbits/s) if MDR3[1] is not set
4. IrDA SIR mode (≤115.2 Kbits/s) if MDR3[1] is not set
5. IrDA MIR mode (0.576 and 1.152 Mbits/s) if MDR3[1] is not set
6. IrDA FIR mode (4 Mbits/s) if MDR3[1] is not set
7. CIR mode (programmable modulation rates specific to remote control applications) if MDR3[1] is not
set
The module performs a serial-to-parallel conversion on received data characters and a parallel-to-serial
conversion on transmitted data characters by the processor. The complete status of each channel of the
module and each received character/frame can be read at any time during functional operation via the line
status register (LSR).
3473
SPRUH73H–October 2011–Revised April 2013 Universal Asynchronous Receiver/Transmitter (UART)
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