Touchscreen Controller Registers
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12.5.1.58 FIFO1DATA Register (offset = 200h) [reset = 0h]
FIFO1DATA is shown in Figure 12-62 and described in Table 12-62.
ADC FIFO1_READ Data@TSC_ADC_SS_FIFO1 READ Register
Figure 12-62. FIFO1DATA Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved ADCCHNLID
R-0h R-0h
15 14 13 12 11 10 9 8
Reserved ADCDATA
R-0h R-0h
7 6 5 4 3 2 1 0
ADCDATA
R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 12-62. FIFO1DATA Register Field Descriptions
Bit Field Type Reset Description
31-20 Reserved R 0h
RESERVED
19-16 ADCCHNLID R 0h Optional ID tag of channel that captured the data.
If tag option is disabled, these bits will be 0.
15-12 Reserved R 0h
RESERVED
11-0 ADCDATA R 0h
12 bit sampled ADC converted data value stored in FIFO 1.
1096
Touchscreen Controller SPRUH73H–October 2011–Revised April 2013
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