Ethernet Subsystem Registers
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14.5.6.35 P2_CONTROL Register (offset = 200h) [reset = 0h]
P2_CONTROL is shown in Figure 14-155 and described in Table 14-170.
CPSW_3GF PORT 2 CONTROL REGISTER
Figure 14-155. P2_CONTROL Register
31 30 29 28 27 26 25 24
Reserved P2_PASS_PRI_TAGG
ED
R/W-0h
23 22 21 20 19 18 17 16
Reserved P2_VLAN_LTYPE2_E P2_VLAN_LTYPE1_E Reserved P2_DSCP_PRI_EN
N N
R/W-0h R/W-0h R/W-0h
15 14 13 12 11 10 9 8
Reserved P2_TS_320 P2_TS_319 P2_TS_132 P2_TS_131 P2_TS_130 P2_TS_129 P2_TS_TTL_NONZE
RO
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h
7 6 5 4 3 2 1 0
Reserved P2_TS_ANNEX_D_E P2_TS_LTYPE2_EN P2_TS_LTYPE1_EN P2_TS_TX_EN P2_TS_RX_EN
N
R/W-0h R-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 14-170. P2_CONTROL Register Field Descriptions
Bit Field Type Reset Description
24 P2_PASS_PRI_TAGGED R/W 0h Port 2 Pass Priority Tagged
0 - Priority tagged packets have the zero VID replaced with the input
port P2_PORT_VLAN
[11:0]
1 - Priority tagged packets are processed unchanged.
21 P2_VLAN_LTYPE2_EN R/W 0h Port 2 VLAN LTYPE 2 enable
0 - disabled
1 - VLAN LTYPE2 enabled on transmit and receive
20 P2_VLAN_LTYPE1_EN R/W 0h Port 2 VLAN LTYPE 1 enable
0 - disabled
1 - VLAN LTYPE1 enabled on transmit and receive
16 P2_DSCP_PRI_EN R/W 0h Port 0 DSCP Priority Enable
0 - DSCP priority disabled
1 - DSCP priority enabled.
All non-tagged IPV4 packets have their received packet priority
determined by mapping the 6 TOS bits through the port DSCP
priority mapping registers.
14 P2_TS_320 R/W 0h Port 2 Time Sync Destination Port Number 320 enable
0 - disabled
1 - Annex D (UDP/IPv4) time sync packet destination port number
320 (decimal) is enabled.
13 P2_TS_319 R/W 0h Port 2 Time Sync Destination Port Number 319 enable
0 - disabled
1 - Annex D (UDP/IPv4) time sync packet destination port number
319 (decimal) is enabled.
12 P2_TS_132 R/W 0h Port 2 Time Sync Destination IP Address 132 enable
0 - disabled
1 - Annex D (UDP/IPv4) time sync packet destination IP address
number 132 (decimal) is enabled.
11 P2_TS_131 R/W 0h Port 2 Time Sync Destination IP Address 131 enable
0 - disabled
1 - Annex D (UDP/IPv4) time sync packet destination IP address
number 131 (decimal) is enabled.
1392
Ethernet Subsystem SPRUH73H–October 2011–Revised April 2013
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