RTC_SS
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20.3.5.20 RTC_SCRATCH0_REG Register (offset = 60h) [reset = 0h]
RTC_SCRATCH0_REG is shown in Figure 20-80 and described in Table 20-83.
The RTC_SCRATCH0_REG is used to hold some required values for the RTC register.
Figure 20-80. RTC_SCRATCH0_REG Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RTCSCRATCH0
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 20-83. RTC_SCRATCH0_REG Register Field Descriptions
Bit Field Type Reset Description
31-0 RTCSCRATCH0 R/W 0h
Scratch registers, available to program
3654
Timers SPRUH73H–October 2011–Revised April 2013
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