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CONTROL_MODULE Registers
9.3.45 vdd_mpu_opp_turbo Register (offset = 77Ch) [reset = 0h]
vdd_mpu_opp_turbo is shown in Figure 9-48 and described in Table 9-55.
Figure 9-48. vdd_mpu_opp_turbo Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
ntarget
R-0h
15 14 13 12 11 10 9 8
ntarget
R-0h
7 6 5 4 3 2 1 0
ntarget
R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 9-55. vdd_mpu_opp_turbo Register Field Descriptions
Bit Field Type Reset Description
31-24 Reserved R 0h
23-0 ntarget R 0h Ntarget value for MPU Voltage domain OPPTURBO
Reset value is device-dependent.
809
SPRUH73H–October 2011–Revised April 2013 Control Module
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