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USB Registers
16.5.1.14 IRQDMATHOLDRX03 Register (offset = 11Ch) [reset = 0h]
IRQDMATHOLDRX03 is shown in Figure 16-35 and described in Table 16-43.
Figure 16-35. IRQDMATHOLDRX03 Register
31 30 29 28 27 26 25 24
DMA_THRES_RX0_15
R/W-0h
23 22 21 20 19 18 17 16
DMA_THRES_RX0_14
R/W-0h
15 14 13 12 11 10 9 8
DMA_THRES_RX0_13
R/W-0h
7 6 5 4 3 2 1 0
DMA_THRES_RX0_12
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-43. IRQDMATHOLDRX03 Register Field Descriptions
Bit Field Type Reset Description
31-24 DMA_THRES_RX0_15 R/W 0h DMA threshold value for rx_pkt_cmp_0 for USB0 Endpoint 15.
23-16 DMA_THRES_RX0_14 R/W 0h DMA threshold value for rx_pkt_cmp_0 for USB0 Endpoint 14.
15-8 DMA_THRES_RX0_13 R/W 0h DMA threshold value for rx_pkt_cmp_0 for USB0 Endpoint 13.
7-0 DMA_THRES_RX0_12 R/W 0h DMA threshold value for rx_pkt_cmp_0 for USB0 Endpoint 12.
USBSS IRQ_DMA_THRSHOLD_RX0_3 Register
1775
SPRUH73H–October 2011–Revised April 2013 Universal Serial Bus (USB)
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