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USB Registers
16.5.1.8 IRQDMATHOLDTX01 Register (offset = 104h) [reset = 0h]
IRQDMATHOLDTX01 is shown in Figure 16-29 and described in Table 16-37.
Figure 16-29. IRQDMATHOLDTX01 Register
31 30 29 28 27 26 25 24
DMA_THRES_TX0_7
R/W-0h
23 22 21 20 19 18 17 16
DMA_THRES_TX0_6
R/W-0h
15 14 13 12 11 10 9 8
DMA_THRES_TX0_5
R/W-0h
7 6 5 4 3 2 1 0
DMA_THRES_TX0_4
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 16-37. IRQDMATHOLDTX01 Register Field Descriptions
Bit Field Type Reset Description
31-24 DMA_THRES_TX0_7 R/W 0h
DMA threshold value for tx_pkt_cmp_0 for USB0 Endpoint 7.
23-16 DMA_THRES_TX0_6 R/W 0h
DMA threshold value for tx_pkt_cmp_0 for USB0 Endpoint 6.
15-8 DMA_THRES_TX0_5 R/W 0h
DMA threshold value for tx_pkt_cmp_0 for USB0 Endpoint 5.
7-0 DMA_THRES_TX0_4 R/W 0h DMA threshold value for tx_pkt_cmp_0 for USB0 Endpoint 4.
USBSS IRQ_DMA_THRSHOLD_TX0_1 Register
1769
SPRUH73H–October 2011–Revised April 2013 Universal Serial Bus (USB)
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