Touchscreen Controller Registers
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12.5.1.12 ADCRANGE Register (offset = 48h) [reset = 0h]
ADCRANGE is shown in Figure 12-16 and described in Table 12-16.
High and Low Range Threshold@TSC_ADC_SS_Range_Check Register
Figure 12-16. ADCRANGE Register
31 30 29 28 27 26 25 24
Reserved High_Range_Data
R-0h R/W-0h
23 22 21 20 19 18 17 16
High_Range_Data
R/W-0h
15 14 13 12 11 10 9 8
Reserved Low_Range_Data
R-0h R/W-0h
7 6 5 4 3 2 1 0
Low_Range_Data
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 12-16. ADCRANGE Register Field Descriptions
Bit Field Type Reset Description
31-28 Reserved R 0h
27-16 High_Range_Data R/W 0h Sampled ADC data is compared to this value.
If the sampled data is greater than the value, then an interrupt is
generated.
15-12 Reserved R 0h
Reserved.
11-0 Low_Range_Data R/W 0h Sampled ADC data is compared to this value.
If the sampled data is less than the value, then an interrupt is
generated.
1050
Touchscreen Controller SPRUH73H–October 2011–Revised April 2013
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