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CONTROL_MODULE Registers
9.3.9 bandgap_ctrl Register (offset = 448h) [reset = 0h]
bandgap_ctrl is shown in Figure 9-12 and described in Table 9-19.
Figure 9-12. bandgap_ctrl Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
dtemp
R-0h
7 6 5 4 3 2 1 0
cbiassel bgroff tmpsoff soc clrz contconv ecoz tshut
R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 9-19. bandgap_ctrl Register Field Descriptions
Bit Field Type Reset Description
31-16 Reserved R 0h
15-8 dtemp R 0h Temperature data from ADC.
To be used when end of conversion (EOCZ) is 0.
7 cbiassel R/W 0h 0: Select bandgap voltage as reference
1: Select resistor divider as reference
6 bgroff R/W 0h 0: Normal operation
1: Bandgap is OFF (OFF Mode)
5 tmpsoff R/W 0h 0: Normal operation
1: Temperature sensor is off and thermal shutdown in OFF mode
4 soc R/W 0h ADC start of conversion.
Transition to high starts a new ADC conversion cycle.
3 clrz R/W 0h 0: Resets the digital outputs
2 contconv R/W 0h 0: ADC single conversion mode
1: ADC continuous conversion mode
1 ecoz R 0h ADC end of conversion
0: End of conversion
1: Conversion in progress
0 tshut R 0h 0: Normal operation
1: Thermal shutdown event (greater than 147C)
771
SPRUH73H–October 2011–Revised April 2013 Control Module
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