LCD Registers
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13.5.21 SYSCONFIG Register (offset = 54h) [reset = 0h]
SYSCONFIG is shown in Figure 13-39 and described in Table 13-34.
Figure 13-39. SYSCONFIG Register
31 30 29 28 27 26 25 24
Reserved
R-0h
23 22 21 20 19 18 17 16
Reserved
R-0h
15 14 13 12 11 10 9 8
Reserved
R-0h
7 6 5 4 3 2 1 0
Reserved standbymode idlemode Reserved
R-0h R/W-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 13-34. SYSCONFIG Register Field Descriptions
Bit Field Type Reset Description
31-6 Reserved R 0h
5-4 standbymode R/W 0h Configuration of the local initiator state management mode
By definition, initiator may generate read/write transaction as long as
it is out of STANDBY state
0: Force-standby mode: local initiator is unconditionally placed in
standby state
Backup mode, for debug only
1: No-standby mode: local initiator is unconditionally placed out of
standby state
Backup mode, for debug only
2: Smart-standby mode: local initiator standby status depends on
local conditions, i
e
the module's functional requirement from the initiator
IP module shall not generate (initiator-related) wakeup events
3: Reserved
3-2 idlemode R/W 0h Configuration of the local target state management mode
By definition, target can handle read/write transaction as long as it is
out of IDLE state
0: Force-idle mode: local target's idle state follows (acknowledges)
the system's idle requests unconditionally, i
e
regardless of the IP module's internal requirements
Backup mode, for debug only
1: No-idle mode: local target never enters idle state
Backup mode, for debug only
2: Smart-idle mode: local target's idle state eventually follows
(acknowledges) the system's idle requests, depending on the IP
module's internal requirements
IP module shall not generate (IRQ- or DMA-request-related) wakeup
events
3: Reserved
1-0 Reserved R/W 0h
1152
LCD Controller SPRUH73H–October 2011–Revised April 2013
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