CONTROL_MODULE Registers
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9.3.26 mac_id0_hi Register (offset = 634h) [reset = 0h]
mac_id0_hi is shown in Figure 9-29 and described in Table 9-36.
Figure 9-29. mac_id0_hi Register
31 30 29 28 27 26 25 24
macaddr_23_16
R-0h
23 22 21 20 19 18 17 16
macaddr_31_24
R-0h
15 14 13 12 11 10 9 8
macaddr_39_32
R-0h
7 6 5 4 3 2 1 0
macaddr_47_40
R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 9-36. mac_id0_hi Register Field Descriptions
Bit Field Type Reset Description
31-24 macaddr_23_16 R 0h MAC0 Address - Byte 2
Reset value is device-dependent.
23-16 macaddr_31_24 R 0h MAC0 Address - Byte 3
Reset value is device-dependent.
15-8 macaddr_39_32 R 0h MAC0 Address - Byte 4
Reset value is device-dependent.
7-0 macaddr_47_40 R 0h MAC0 Address - Byte 5
Reset value is device-dependent.
790
Control Module SPRUH73H–October 2011–Revised April 2013
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