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Enhanced Capture (eCAP) Module
15.3.4.1.3 CAP1 Register (offset = 8h) [reset = 0h]
CAP1 is shown in Figure 15-118 and described in Table 15-111.
Figure 15-118. CAP1 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CAP1
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 15-111. CAP1 Register Field Descriptions
Bit Field Type Reset Description
31-0 CAP1 R/W 0h This register can be loaded (written) by: (a) Time-Stamp (that is,
counter value) during a capture event.
(b) Software may be useful for test purposes.
(c) APRD active register when used in APWM mode.
1637
SPRUH73H–October 2011–Revised April 2013 Pulse-Width Modulation Subsystem (PWMSS)
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