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EDMA3 Registers
Table 11-109. Destination FIFO Options Register (DFOPTn) Field Descriptions (continued)
Bit Field Value Description
1 DAM Destination address mode within an array
0 Increment (INCR) mode. Destination addressing within an array increments.
1 Constant addressing (CONST) mode. Destination addressing within an array wraps around upon
reaching FIFO width.
0 SAM Source address mode within an array
0 Increment (INCR) mode. Source addressing within an array increments.
1 Constant addressing (CONST) mode. Source addressing within an array wraps around upon reaching
FIFO width.
1013
SPRUH73H–October 2011–Revised April 2013 Enhanced Direct Memory Access (EDMA)
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