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Enhanced PWM (ePWM) Module
Table 15-43. EPWM1 Initialization for Figure 15-57
Register Bit Value Comments
TBPRD TBPRD 1200 (4B0h) Period = 1201 TBCLK counts
TBPHS TBPHS 0 Clear Phase Register to 0
TBCTL CTRMODE TB_UP
PHSEN TB_DISABLE Phase loading disabled
PRDLD TB_SHADOW
SYNCOSEL TB_SYNC_DISABLE
CMPCTL SHDWAMODE CC_SHADOW
SHDWBMODE CC_SHADOW
LOADAMODE CC_CTR_ZERO Load on CTR = 0
LOADBMODE CC_CTR_ZERO Load on CTR = 0
AQCTLA PRD AQ_CLEAR
CAU AQ_SET
Table 15-44. EPWM2 Initialization for Figure 15-57
Register Bit Value Comments
TBPRD TBPRD 1400 (578h) Period = 1401 TBCLK counts
TBPHS TBPHS 0 Clear Phase Register to 0
TBCTL CTRMODE TB_UP
PHSEN TB_DISABLE Phase loading disabled
PRDLD TB_SHADOW
SYNCOSEL TB_SYNC_DISABLE
CMPCTL SHDWAMODE CC_SHADOW
SHDWBMODE CC_SHADOW
LOADAMODE CC_CTR_ZERO Load on CTR = 0
LOADBMODE CC_CTR_ZERO Load on CTR = 0
AQCTLA PRD AQ_CLEAR
CAU AQ_SET
Table 15-45. EPWM3 Initialization for Figure 15-57
Register Bit Value Comments
TBPRD TBPRD 800 (320h) Period = 801 TBCLK counts
TBPHS TBPHS 0 Clear Phase Register to 0
TBCTL CTRMODE TB_UP
PHSEN TB_DISABLE Phase loading disabled
PRDLD TB_SHADOW
SYNCOSEL TB_SYNC_DISABLE
CMPCTL SHDWAMODE CC_SHADOW
SHDWBMODE CC_SHADOW
LOADAMODE CC_CTR_ZERO Load on CTR = 0
LOADBMODE CC_CTR_ZERO Load on CTR = 0
AQCTLA PRD AQ_CLEAR
CAU AQ_SET
1561
SPRUH73H–October 2011–Revised April 2013 Pulse-Width Modulation Subsystem (PWMSS)
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