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I2C Registers
Table 21-22. I2C_DMATXWAKE_EN Register Field Descriptions (continued)
Bit Field Type Reset Description
4 Reserved R 0h
3 DRDY R/W 0h
Receive/transmit data ready IRQ wakeup set.
0x0 = Transmit/receive data ready wakeup disabled
0x1 = Transmit/receive data ready wakeup enabled
2 ARDY R/W 0h
Register access ready IRQ wakeup set.
0x0 = Register access ready wakeup disabled
0x1 = Register access ready wakeup enabled
1 NACK R/W 0h
No acknowledgment IRQ wakeup set.
0x0 = Not Acknowledge wakeup disabled
0x1 = Not Acknowledge wakeup enabled
0 AL R/W 0h
Arbitration lost IRQ wakeup set.
0x0 = Arbitration lost wakeup disabled
0x1 = Arbitration lost wakeup enabled
3743
SPRUH73H–October 2011–Revised April 2013 I2C
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