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I2C Registers
Table 21-39. I2C_SBLOCK Register Field Descriptions (continued)
Bit Field Type Reset Description
0 OA0_EN R/W 0h Enable I2C clock blocking for own address 0.
When the CPU sets a bit location to 1, if an external master using
the corresponding own address addresses the core, the core will
block the I2C clock right after the address phase.
For releasing the I2C clock the CPU must write 0 in the
corresponding field.
Value after reset is low.
0x0 = I2C clock released
0x1 = I2C clock blocked
3767
SPRUH73H–October 2011–Revised April 2013 I2C
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